This invention relates, in general, to a method of fabricating a semiconductor component, and more particularly, to a method of defining a line width.
With the ever increasing demand for smaller and more compact semiconductor components, designers are shrinking the size of gate lengths, line widths, and the like. However, it is difficult to manufacture a precise line width for submicron geometries because conventional photolithographic techniques are not sufficient. Alternative methods for forming a submicron line width include using phase shifting technology, electron beam lithography, ion beam lithography, and X-ray lithography. While phase shifting technology can define 0.35 micron line widths, it is also expensive and complicated. Electron beam lithography, ion beam lithography, and X-ray lithography are capable of defining 0.1 micron line widths, but these non-standard techniques are even more expensive and complicated than phase shifting technology.
Another existing method for defining small line widths includes etching an opening having a larger line width and forming spacers along sidewalls of the opening to reduce the size of the opening and to reduce the size of the final line width. However, this technique is still limited by the photolithographic capability that defines the original opening.
Accordingly, a need exists for a low cost method of defining a line width, especially when the line width is less than one micron. The method should be manufacturable and should not significantly increase the cycle time of manufacturing a semiconductor component.